This is a recreation of CLD RAMBoard aimed at 1541-II drive with important change: 24K(32K) ROM support. It can be also configured to switch between two banks of 24K(32K) ROMs out of 64K ROM chip or one of four 16K banks.

It supports the following software:

• DolphinDOS2 using much fewer components than original circuit
• software that needs extra 8K of RAM, such as Maverick
• patches for CBM DOS / JiffyDOS / SpeedDOS use extra ROM space to implement faster GCR decoding procedures from 1571 ROM
• patches also utilize drive RAM expansion to cache the current track

Note that for DolphinDOS 2 and SpeedDOS you need a parallel connection to C64/128 user port. Since the hardware side is the same, if you have no other reason to stick with SpeedDOS you should really go with DolphinDOS 2.

Please read the schematic for description of jumpers and optional parts.

Components

• 2x 28 round goldpins to interconnect with mainboard in place of original ROM
• 2x DIP28 sockets
• 1x DIP16 socket
• 1x 74LS139 (HC or HCT will work too)
• 10k resistor - one or two
• a switch - one or two
• 6264 or 62256 SRAM
• 32K (27'256) or 64K (27'512) EPROM/EEPROM

RAM/ROM expansion

This board is active only when upper half of memory is accessed (A15=1).

The default configuration is to short ROM_A14 jumper, install pullup R15 and a switch to open/short round pad of ROM_A15 to GND. This way you can choose one of two ROMs and the memory layout includes 8K RAM and 24K ROM. The lowest 8K of ROM is not used.

• range $8000-$9FFF is RAM (8K)
• range $A000-$BFFF is ROM (8K)
• range $C000-$FFFF is ROM (16K)

This is what you need for DolphinDOS 2.

You can also keep ROM_A14 open and install both R14/R15 and two switches on ROM_A14/_A15 that would short their round pads to the ground. This keeps ROM only in $C000-$FFFF range but you can now choose one of four 16K banks.

If you use 6264 RAM then keep RAM_A13 open and jumper RAM pin 26 to VCC. For 62256 (8K out of 32K would be used) short both RAM_A13 and RAM_A14

Installation in 1541-II

Read all the details on the project page. There are issues with vertical clearance inside 1541-II, under the drive mechanism, even with 0.6mm think PCB.

You need two extra signals from the mainboard:

• A14 from CPU (U3) pin 24
• R/W from RAM (U5) pin 21, you can trace it to the gate array (U10) pin 29 or 31 (depending on PCB revision), there is also a convenient via near R42

Initial tests can be done without desoldering enything. I recommend testing first with drive mechanism put aside and if everything works just remove original ROM socket and solder in the daughterboard. Using ROM_A14/15 and R14/R15 pullups you can always go back to the original configuration.

Software

On the project page in the 'Releases' section I provide patched ROMs of original CBM DOS for 1541-II, SpeedDOS Plus and Plus+ that use extra 8K of RAM to cache current track so that all data can be read and decoded within two disk revolusions. There is also DolphinDOS2 that will work out of the box.

I also provide the source code for patches that can be readily used to patch JiffyDOS for 1541-II.

DolphinDOS 2

I highly recommend going with DolphinDOS 2 option for 25x speedup of original operation.

You will need a parallel cable between C64/128 user port and 1541-II for that as described on the project page.